R&D Engineering, Sr Engineer

Sr Memory Design Engineer

We Are

Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.

You Are

You have spent enough time with CMOS circuits and memory design to know that SRAM is not just about cells on a grid, it is about tradeoffs that cascade through performance, power, and area in ways that only reveal themselves under real conditions. You understand digital electronics at a level where you can look at a circuit, trace the problem, and know whether it is a design issue or something deeper in the flow.

You are the kind of engineer who learns new environments quickly because you ask the right questions and do not wait to be handed a perfect roadmap. When something breaks or behaves unexpectedly, you dig in. Root cause matters to you, not just workarounds. You are comfortable working in R&D where the problems are not always well defined and the solutions require both rigor and creativity.

At Synopsys, you will work on memory compiler development that directly impacts semiconductor IP used across the industry. The team is focused on SRAM innovation, and what you build will matter to products that depend on reliable, high-performance memory.

What You'll Be Doing

• Design and analyze SRAM circuits as part of memory compiler R&D projects within the IPG organization
• Debug memory circuit behavior, trace issues through design and flow, and identify root causes that affect performance or functionality
• Learn and work within internal memory compiler development flows and contribute to ongoing SRAM development activities
• Collaborate with engineering teams on circuit analysis, validation, and design improvements for memory IP
• Support research initiatives focused on advancing SRAM technology and compiler capabilities
• Contribute to design reviews, technical discussions, and documentation that shape memory compiler deliverables

The Impact You Will Have

• Expand the engineering capacity of a team building memory compiler technology that powers semiconductor products globally
• Improve SRAM circuit performance and reliability through rigorous analysis and debugging contributions
• Accelerate memory compiler development timelines by becoming productive quickly and contributing meaningfully within your first six months
• Support innovation in memory IP that enables customers to build faster, more power-efficient chips
• Strengthen the technical foundation of SRAM development through disciplined circuit design and validation work
• Help Synopsys maintain leadership in memory compiler technology by contributing to R&D that pushes the boundaries of what memory IP can do

What You'll Need

• Bachelor's or Master's degree in Electronics Engineering, Electrical Engineering, VLSI, or a related field
• Strong foundation in CMOS fundamentals and digital electronics
• Hands-on experience with SRAM design or memory circuit design
• Demonstrated ability to analyze circuits, debug complex issues, and perform root cause analysis
• Understanding of semiconductor memory development principles
• Experience with memory compiler development or SRAM validation is a strong plus

Who You Are

• You can look at a memory circuit schematic and quickly identify where a performance bottleneck or functional issue might be hiding
• You do not need everything explained twice, you learn development flows by doing, asking targeted questions, and connecting the dots yourself
• When a simulation result does not match expectations, you treat it as a puzzle worth solving, not a reason to escalate immediately
• You are comfortable contributing independently once you understand the context, but you also know when to pull in others for a second perspective
• You can explain a circuit tradeoff or a debugging approach clearly enough that a teammate with a different focus area understands the core issue

The Team You'll Be Part Of

You will join the memory compiler development team within the IP Group, focused on SRAM-related R&D activities. This team is responsible for advancing memory circuit design, analysis, and debugging as part of Synopsys's broader memory technology innovation efforts. The work is technical, collaborative, and directly tied to delivering memory IP that customers depend on.

Rewards and Benefits

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.