Scan your resume against ATS criteria for this STA/Synthesis Engineer - Pune role at nHRMS.
We are hiring an STA/Synthesis Engineer to join our VLSI delivery team. You will own synthesis and static timing analysis across design blocks, driving timing signoff from RTL through tapeout
SDC and UPF constraint development, including DFT-aware constraints
Pre- and post-layout timing closure across corners and modes
Manual ECO generation to resolve timing and DRC violations
Timing closure at block, subsystem and full-chip level
Lead and mentor a team of 4-5 engineers on STA/Synthesis practices
Partner closely with RTL design and Physical Design teams on SoC timing closure
Requirements:
4+ years of hands-on experience in STA and Synthesis
Strong TCL scripting and Unix environment skills
Comprehensive knowledge of timing signoff flows and constraint development
How to apply for STA/Synthesis Engineer - Pune at nHRMS?
Click the "Apply on Company Website" button on this page to submit your application directly on the employer's official portal.
What is the salary for this role?
Salary details will be discussed during the interview.
What experience is required?
4+ years of experience is required.
Is this position still open?
Yes, currently active and accepting applications.
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STA/Synthesis Engineer - Pune
nHRMS · Pune
