Lead RF Layout Designer

Title: Lead RF Layout Designer

About GF

GlobalFoundries (GF) is a leading manufacturer of essential semiconductors, enabling AI at scale from the cloud to the physical world. Through deep partnerships with customers, GF delivers differentiated, power efficient and high-performance solutions for high growth markets. With global manufacturing operations across the U.S., Europe and Asia, GF is a trusted and holistic technology partner for customers around the world. GF’s talented, global team remains focused every day on security, longevity and sustainability. For more information,
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Introduction

As RF Layout Designer is responsible for leading the physical implementation of high‑performance RF/analog integrated devices, test structures, and supporting technology development and PDK enablement. This role bridges circuit design, device technology, and manufacturable layout to ensure optimal performance, yield, and reliability.

The position requires a technically strong, hands-on expert in CMOS/RF layout design with the ability to develop automation solutions, collaborate across teams, and support next-generation RF communication technologies. The individual will also act as a technical leader, contributing to innovation, mentoring team members, and driving technology introduction and ramp.

• Your Job:

• Lead layout design and physical implementation for RF/Analog circuits and test structures.
• Deliver qualification test chips on schedule while meeting quality and cost targets.
• Collaborate with device, process, and design teams to define and validate design rules and methodologies.
• Support new technology node enablement, stack development, and layout guidelines.
• Provide feedback for improving PDK quality, design rules, and layout productivity.
• Develop and utilize automation scripts (e.g., SKILL) to enhance design efficiency.
• Optimize layouts for performance, area, and manufacturability while adhering to foundry rules.
• Drive cross-functional collaboration to enable fast technology introduction and ramp.
• Lead small teams or projects, acting as a technical/project leader when required.
• Train and mentor junior engineers to improve workflow quality and technical capability.

Other Responsibilities

• Perform all activities in a safe and responsible manner.
• Support all Environmental, Health, Safety & Security (EHS&S) requirements and programs.

Required Qualifications

• Bachelor’s degree in Electrical Engineering or related field with

12-15 years of experience

, OR

• Master’s degree with

10+ years of experience

, OR

• PhD with

8+ years of experience

.

• Strong expertise in RF/Analog layout design using CMOS technologies.
• Hands-on experience with Cadence Virtuoso and SKILL programming.
• Strong understanding of foundry design rules and layout optimization techniques.
• Proven experience delivering complex layouts and test chip tapeouts.
• Ability to solve complex, non-recurring technical problems independently.
• Demonstrated experience working in cross-functional environments.

Preferred Qualifications

• Experience in advanced node technology development and RF communication applications.
• Ability to compact and optimize designs beyond standard rule interpretation.
• Proven track record of leading small teams or technical projects.
• Contributions to patents, publications, or technical conferences.
• Exposure to PDK development and design rule definition.

GlobalFoundries is an equal opportunity employer, cultivating a diverse and inclusive workforce. We believe having a multicultural workplace enhances productivity, efficiency and innovation whilst our employees feel truly respected, valued and heard.

As an affirmative employer, all qualified applicants are considered for employment regardless of age, ethnicity, marital status, citizenship, race, religion, political affiliation, gender, sexual orientation and medical and/or physical abilities. All offers of employment with GlobalFoundries are conditioned upon the successful completion of background checks, medical screenings as applicable and subject to the respective local laws and regulations.

Information about our benefits you can find here:

• Bachelor’s degree in Electrical Engineering or related field with 12-15 years of experience, OR
• Master’s degree with 10+ years of experience, OR
• PhD with 8+ years of experience.
• Strong expertise in RF/Analog layout design using CMOS technologies.
• Hands-on experience with Cadence Virtuoso and SKILL programming.
• Strong understanding of foundry design rules and layout optimization techniques.
• Proven experience delivering complex layouts and test chip tapeouts.
• Ability to solve complex, non-recurring technical problems independently.
• Demonstrated experience working in cross-functional environments.
• Experience in advanced node technology development and RF communication applications.
• Ability to compact and optimize designs beyond standard rule interpretation.
• Proven track record of leading small teams or technical projects.
• Contributions to patents, publications, or technical conferences.
• Exposure to PDK development and design rule definition.