Scan your resume against ATS criteria for this ATE Test Engineer – Optical Transceiver Silicon role at LUMILENS.
Lumilens builds optical interconnect for AI data centers: silicon photonics, mixed-signal ICs, electrical-optical interposers, and the systems around them. Our silicon ships in production AI clusters today, and volume is climbing fast.
You will develop and own production test programs for our mixed-signal ICs — the SerDes, TIAs, modulator drivers, and control silicon at the heart of our co-packaged optics and pluggable transceivers. You will take test content from bring-up on the bench through to release at the OSAT, and stay with it through production.
Singapore puts you inside the assembly and test supply chain we depend on. You will be hands-on with our test partners in the region, working alongside a senior test engineer and partnering with design and validation teams across the US, India, and Singapore.
This is the role where you go from executing someone else's test plan to owning your own.
Own test program development for assigned devices or blocks: build the test list against the coverage plan, and take it through wafer sort and final test insertions.
Develop, debug, and optimize ATE test programs for mixed-signal and high-speed devices — analog and DC parameters, high-speed signal path, on-chip test points, digital scan, and firmware-driven test modes.
Support test hardware bring-up: review load board and probe card designs, debug hardware issues in the lab, and work with vendors through first article.
Participate in first-silicon bring-up alongside design and validation. Correlate ATE results to bench characterization, and investigate when they disagree.
Be the day-to-day technical contact for your programs at our OSATs: release, correlation across testers and sites, multi-site and test time optimization, and production support.
Analyze sort and final test data to find yield limiters, marginal tests, and guard-band problems. Drive the fixes on your devices and support failure analysis on returns and excursions.
Build the reusable test IP, scripts, and data tooling that make the whole team faster.
BS/MS in Electrical Engineering, Computer Engineering, Physics, or a related field.
3–5 years developing production test for mixed-signal or high-speed ICs, including at least test program you took to production release.
Hands-on ATE experience on at least major platform (Advantest 93K or T2000, Teradyne UltraFLEX or J750, Eagle, Chroma, or comparable).
Strong programming: C/C++ and Python, on Linux. You write test code other engineers can read and extend.
Solid analog and mixed-signal fundamentals — you can read a schematic, reason about a datasheet spec, and design the measurement that proves it.
Practical test hardware skills: load board and probe card debug, bench instrumentation (scopes, BERTs, SMUs, network analyzers, VNAs), and lab troubleshooting.
Working knowledge of optical systems and networks: how an optical transceiver works, optical power and link budgets, and high-speed serial protocols such as Ethernet and PAM4 signaling.
Statistical fluency for yield and correlation work — JMP, MATLAB, Python/pandas, or equivalent.
Some exposure to OSAT or subcontract test operations, and comfort working with external partners.
Willingness to travel regionally to test sites, and to overlap with US and India hours when a bring-up or an excursion calls for it.
Silicon photonics, optical transceiver, or opto-electrical test background — coupled-fiber test, optical power and wavelength measurement, TIA and driver characterization.
High-speed SerDes test experience: BER, jitter decomposition, eye margining, loopback methods.
DFT familiarity: scan, MBIST, JTAG/IEEE 1149, on-chip instrumentation and monitors.
STDF and test data pipelines; building analytics that engineers actually use.
Experience supporting a product through its first production ramp.
Optical I/O for AI is being defined right now, and test is of the places where it is won or lost — a part that cannot be screened economically does not ship, however good the design. The team is small, so your programs are yours: you will see your test content go from a bench setup to millions of parts, and grow into owning test architecture as we scale.
Own test program development for assigned devices or blocks: build the test list against the coverage plan, and take it through wafer sort and final test insertions.
Develop, debug, and optimize ATE test programs for mixed-signal and high-speed devices — analog and DC parameters, high-speed signal path, on-chip test points, digital scan, and firmware-driven test modes.
Support test hardware bring-up: review load board and probe card designs, debug hardware issues in the lab, and work with vendors through first article.
Participate in first-silicon bring-up alongside design and validation. Correlate ATE results to bench characterization, and investigate when they disagree.
Be the day-to-day technical contact for your programs at our OSATs: release, correlation across testers and sites, multi-site and test time optimization, and production support.
Analyze sort and final test data to find yield limiters, marginal tests, and guard-band problems. Drive the fixes on your devices and support failure analysis on returns and excursions.
Build the reusable test IP, scripts, and data tooling that make the whole team faster.
BS/MS in Electrical Engineering, Computer Engineering, Physics, or a related field.
3–5 years developing production test for mixed-signal or high-speed ICs, including at least test program you took to production release.
Hands-on ATE experience on at least major platform (Advantest 93K or T2000, Teradyne UltraFLEX or J750, Eagle, Chroma, or comparable).
Strong programming: C/C++ and Python, on Linux. You write test code other engineers can read and extend.
Solid analog and mixed-signal fundamentals — you can read a schematic, reason about a datasheet spec, and design the measurement that proves it.
Practical test hardware skills: load board and probe card debug, bench instrumentation (scopes, BERTs, SMUs, network analyzers, VNAs), and lab troubleshooting.
Working knowledge of optical systems and networks: how an optical transceiver works, optical power and link budgets, and high-speed serial protocols such as Ethernet and PAM4 signaling.
Statistical fluency for yield and correlation work — JMP, MATLAB, Python/pandas, or equivalent.
Some exposure to OSAT or subcontract test operations, and comfort working with external partners.
Willingness to travel regionally to test sites, and to overlap with US and India hours when a bring-up or an excursion calls for it.
Silicon photonics, optical transceiver, or opto-electrical test background — coupled-fiber test, optical power and wavelength measurement, TIA and driver characterization.
High-speed SerDes test experience: BER, jitter decomposition, eye margining, loopback methods.
DFT familiarity: scan, MBIST, JTAG/IEEE 1149, on-chip instrumentation and monitors.
STDF and test data pipelines; building analytics that engineers actually use.
Experience supporting a product through its first production ramp.
Optical I/O for AI is being defined right now, and test is of the places where it is won or lost — a part that cannot be screened economically does not ship, however good the design. The team is small, so your programs are yours: you will see your test content go from a bench setup to millions of parts, and grow into owning test architecture as we scale.
How to apply for ATE Test Engineer – Optical Transceiver Silicon at LUMILENS?
Click the "Apply on Company Website" button on this page to submit your application directly on the employer's official portal.
What is the salary for this role?
Salary details will be discussed during the interview.
What experience is required?
5+ yrs of experience is required.
Is this position still open?
Yes, currently active and accepting applications.
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